Integrated Circuits Manufacturing

CIDESI offers the manufacturing of integrated circuits by using NMOS and CMOS technologies in Multi-Project wafers.

Multi-Project Wafers (MPW) Service: It is a service that sums up a big number of integrated circuits designs in a silicon wafer to reduce the high cost of manufacturing. The benefits include:

Benefits:

Low manufacturing cost


Chip packing 


3 runs per year


Third run 2021:

Day
Hour
Minute
Second

Microtechnologies laboratory

HIGHLY SPECIALIZED FACILITIES

Manufacture your Integrated Circuit

Follow the next steps to manufacture your own integrated circuit:

one (1)

Download the Process Design Kit (PDK)

Ultima versión de PDK

two (1)

Register your design

Fill up the following form, we will reply via e-mail with the terms and conditions and the identifier number of your design.

Registro de diseños
Funcionamiento del dispositivo, partes, etc.
three (1)

Send your design

We will check it out and keep you informed about its status. Remember sending the design in GDS format inside a compressed file (.ZIP or .RAR)

Design Upload
Este numero es proporcionado por correo después de registrar tu diseño y aceptar los términos y condiciones.
Click or drag a file to this area to upload.
Sube tu diseño en un archivo comprimido *.ZIP*. El diseño debe ser formato .GDS, no mayor a 4 capas de diseño.

Additional information

Electric trial

Performed directly on the wafer during the manufacturing process

Encapsulated

Encapsulating process on manufactured chips.

Wafer cut

Process of wafer cuts in standard sizes.

Trial chip

Micropicture of a chip designed in CIDESI to try digital systems

Wafers on process

Processed wafers during the development of PMOS transistors.

Process of digital systems design in an integrated circuit

For desginers that work in digital systems with Hardware Description Languages (HDL), the Multi-Project Wafer Service (MPWS) offers the possibility to implement a design flow of integrated circuits using only free-access tools. This way, the chances to perform trials in silicon desgins increase.

Proceso-de-diseño-digital-para-IC

Actualización 21/02/22: Estamos mejorando el foro y por el momento se encuentra en mantenimiento. Puedes solicitar soporte técnico a través de los correos: microtecnologias@cidesi.edu.mx o contacto@obleamultiproyecto.com

Weekly newsletter

Resistance Temperature Detectors (RTDs) manufacturing

If you are interested in using the CIDESI Queretaro clean room facilities, do not hesitate contacting us... For temperature meassurement there are a lot of different methods that according to its operation principle can be clasified in touching and non-touching. Inside the clasification of contact thermometers, are found the thermocouples, thermistors and resistance temperature detectors.

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Newsletter #19 Jun-2020

Recepción de diseños SOMP Boletín #19 Julio-2020 Boletín #19 Julio-2020 Recepción de diseños SOMP Segunda corrida 2020 El equipo de Oblea Multi-proyecto abre oficialmente la recepción de diseños VLSI para la segunda corrida anual del servicio de fabricación multi-proyecto. Se extiende la invitación a los diseñadores interesados a someter sus diseños en la pagina de…

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Newsletter #17 May-2020

Process for design register first run MPWS

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Newsletter #16 May-2020

Reminder: Deadline for design reception MPWS (May 31st)

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Newsletter #15 May-2020

CONTEST MPWS: Best VLSI design

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Newsletter #14 May-2020

Course for implementing free platforms for VLSI design (AVAILABLE ONLINE)

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Newsletter #14 April-2020

Extension of the deadline for MPWS designs reception (May 31st)

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Newsletter #13 April-2020

Third WEBINAR about the use of free-access platforms for VLSI design

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Newsletter #12 April-2020

Attend our informative WEBINAR: Tutorial about the use of free-access platforms for VLSI design

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Newsletter #11 April-2020

Attend our informative WEBINAR Tutorial about the use of free-access platforms for VLSI design

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Tutorials:

Learn how to use free access tools to design and send up to manufacture your own designs with our process.

1st WEBINAR:

Tutorial about the use of free platforms for VLSI design (Part 1)

2nd WEBINAR:

Tutorial about the use of free platforms for VLSI design (Part 2)

3rd WEBINAR:

Tutorial about the use of free platforms for VLSI design (Part 3)

Files

Additional information about our manufacturing processes.

Contact

Leave us a message

Get in touch to know more about the project

Centro de Ingeniería y Desarrollo Industrial

Microtechnologies adress

Av. Playa, Av. Pie de la Cuesta No. 702, Desarrollo San Pablo, 76125 Santiago de Querétaro, Qro.

Contact phone: +52 (442) 2119800 Ext. 5040

E-mail: microtecnologias@cidesi.edu.mx

                                contacto@obleamultiproyecto.com